Mechanizing Verification of Arithmetic Circuits: SRT Division
نویسندگان
چکیده
The use of a rewrite-based theorem prover for verifying properties of arithmetic circuits is discussed. A prover such as Rewrite Rule Laboratory (RRL) can be used eeectively for establishing number-theoretic properties of adders, multipliers and dividers. Since veriication of adders and multipliers has been discussed elsewhere in earlier papers, the focus in this paper is on a divider circuit. An SRT division circuit similar to the one used in the Intel Pentium processor is mechanically ver-iied using RRL. The number-theoretic correctness of the division circuit is established from its equational speciication. The proof is generated automatically, and follows easily using the inference procedures for con-textual rewriting and a decision procedure for the quantiier-free theory of numbers (Presburger arithmetic) already implemented in RRL. Additional enhancements to rewrite-based provers such as RRL that would further facilitate verifying properties of circuits with structure similar to that of the SRT division circuit are discussed.
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